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KiCad (component library repo)

Repo: ~/Documents/GitHub/KiCad — symbols/, footprints/, 3dmodels/, blocks/, template/.

Facts

  • Field conventions: kicad-symbol-fields
  • ~8,660 symbols; ~8,300 carry an MPN but under 5 field names: "Manufacturer Part Number" (8339), "Manufacturer_Part_Number" (95), "Manufacturer Product Number" (77, +8 with trailing space), "Part Number" (12), "Part_Number" (11). ~8,190 carry a "JLCPCB" LCSC number.
  • Bulk is Yageo passives (5,557), Panasonic (622), onsemi (538), Bourns (457).
  • Schematic house-style tools live in the repo, scripting/schematic/ (README there): kicad-overlap-check, kicad-tidy, kicad-tidy-check; kicad-pcb-from-netlist (scripting/pcb/) is a headless Update PCB from Schematic plus first placement. Hellen boards build with scripting/hellen/ hellen-create-board. All are symlinks in ~/.local/bin. Procedure: SOP-021 step 8.
  • Generic passives carry no IPN (SOP-008 section 7): numbers go on the placed instances at BOM time. The Panasonic 1206 1% and the 0805/1206 5% libraries have LCSC blank by design (the JLC part is an ERP substitute), so do not hand-fill LCSC there.

Open

<<<<<<< Updated upstream - [ ] Rendered overlap, later: (2) symbol check in library CI, (3) sch_gen auto-nudges fields. Decide if KiCad's DNP cross over a field counts (Mounting-Hole_3mm: 8 hits). - [ ] Run kicad-check on the server after the 2026-10-30 merges (#5 BLE54 parts, #6 title block 006): not run before merging; expect 2 missing 3D models (QFN-48-1EP_6x6mm_P0.4mm_EP4.6x4.6mm, Crystal_SMD_2012-2Pin_2.0x1.2mm) per SOP-008 step 40. ======= - [ ] ERP part EE-C-0241 (Taiyo Yuden LBMF1608T100M): repoint its Symbol to EmbeddedEra:L_10uH_0603_80mA (renamed 2026-11-01 merge; L_10uH_0603 is now the Murata LQM18DN100M70L). - [ ] Run kicad-check on the server after the 2026-10-30 merges (#5 BLE54 parts, #6 title block 006) and the 2026-10-31/11-01 merges of #10, #9, #11 (b047dad, 4a2757c, 734cb8c): not run before merging; expect 2 missing 3D models (QFN-48-1EP_6x6mm_P0.4mm_EP4.6x4.6mm, Crystal_SMD_2012-2Pin_2.0x1.2mm) per SOP-008 step 40.

Stashed changes - [ ] Walk SOP-045 (KiCad design blocks) on a real board and flip it to active: place a block with layout as a group, Update PCB with "Group footprints based on symbol groups", Apply Design Block Layout. Then add layouts to the 19 schematic-only blocks in blocks/EmbeddedEra.kicad_blocks/ (most reused first: Stm32g0b1c_48pin, Can, RS3485, USB_C_2) and retire the old blocks/<name>/ project folders (SOP-008 step 35). SOP-045 was written on the Mac and is not yet published: run sop-deploy on the server. - [ ] Optional, on or after 2026-11-05: delete the AFEX pre-purge backups in ~/precious (*-pre-afex-purge-20261006.git, Robot-Cow-004B-A-fab.pre-afex-purge-20261006.zip, afex-commit-maps-20261006/). Owner 2026-10-06: only the KiCad libraries mattered; the other AFEX follow-ups (GitHub support ticket, Universal_Tester, local resync, ~/precious hits) are dropped. - [ ] STI-2004 parts (branch sti2004-parts, now fully in master via garage-door-parts, c110c74; both missing models added 2026-10-29): run kicad-erp-sync audit and pull (dry run, then --yes) for the new non-generic parts (SOP-008 steps 5-9), then install-kicad-libs.sh. - [x] (kicad-erp-sync fixed 2026-10-30, ops-scripts ac257ed: KICAD_LIB_REPO) kicad-adopt (line 17) and kicad-erp-sync (line 20) hard-code REPO=~/kicad-lib, so they cannot work on a branch worktree; SOP-008 step 39 says to work on a branch. Add a --repo option (or honour $EMBEDDEDERA_DIR). - [ ] JK-nSMD005 manufacturer name "Jinrui" is from LCSC only (not at Digi-Key/Mouser/Nexar): confirm before the ERP part is created. - [ ] Own-libraries rule leftovers (2026-10-06, branch own-libs of ~/kicad-lib, not merged because kicad-check fails 8 library items, 118 errors = 110 + 8). No 3D model source: LED_WS2812B-2020_PLCC4_2.0x2.0mm (EE-C-0133; KiCad's own footprint points at a STEP its repo does not have), LED_Kingbright_KPA-3010_3x2x1mm, nucleo32, and the YAAJ BluePill/BlackPill footprints (5 files, Windows D:/ .wrl paths). Add STEP files to 3dmodels/ (vendor download), then merge own-libs. XDCR_AT-1127-ST-2-R was linked to the existing AT-1127-ST-2-R.STEP with zero offset/rotation: check it in 3D. - [ ] Apply the ERP Symbol/Footprint change list in one approved step: ~/Notes/projects/kicad-erp-own-libs-change-list.csv (82 parts, 70 active; templates 1 and 2). Until then kicad-erp-sync audit shows 74 non-EmbeddedEra references and about 90 field mismatches (symbols already moved, ERP not). Merge own-libs first. - [ ] Design projects still on stock libraries (report only, not edited): 1789 schematic/board files in 560 folders reference power:, Device:, Neoden_YY1_PNP:, Resistor_SMD: etc. and non-EmbeddedEra 3D models; most are copies under ~/engineering, ~/precious. Migrate each when next edited (SOP-008 step 41). power: symbols (23,932 refs) have no EmbeddedEra copy yet; Neoden_YY1_PNP.kicad_sym stays beside its EmbeddedEra copy until designs move.

See ~/Notes/tasks.md — this section is now generated from the task register.

  • Ask GitHub support to purge cached views and old commit SHAs of EmbeddedEra/KiCad (sensitive-data removal): force-push does not remove old commits from direct SHA URLs. (Same request covers Cow_Robot_Board: its refs/pull/1..14 still hold the old commits; see the 2026-10-06 Cow_Robot_Board purge entry.)
  • Redraw if ever needed (no stock equivalent, blanked Footprint field in Bourns_output / Onsemi_Diodes_output*): D_SOD-123FL, D_SOD-123FA, D_SOD-123HE, D_SOD-323HE, D_SMA-FL, D_SOD-523F, D_SOD-723, D_SOD-923F, D_SOT-723, D_SOT-1123, D_SC-59, and 28 Bourns SRN inductor footprints (SRN1060 and SRN8040TA exist in stock but without a STEP model).
  • ERP part EE-C-0144 still carries footprint AFEX Library:D_SOD-123F; kicad-erp-sync audit now shows 92 field mismatches (was 34) because KiCad symbols point at EmbeddedEra_Library names and the ERP still has stock names. Repoint ERP footprints via the sandbox first (SOP-008).
  • Review and merge (or delete) the rescue/mac-2026-10-12/* branches pushed from Angel's MacBook Air when its pre-purge clones were retired: Cow_Remote (master, turning-control, remote-tester), cricket (main, main-wip, low-power), BuzzBand (fix-sound-light-sleep, fix-sound-light-sleep-wip), Cow_LCD (Frequency_Hopping), Universal_Tester, Robot_Link, git-ai-commit, codex-personal (main/master-wip), The_Real_Cow_Configurator (Organization-stash). Each starts from the clean GitHub commit its local work was built on, so it may need rebasing onto today's branch.
  • MacBook Air ~/Documents/GitHub/Server/*.md (HOW_TO_ACCESS_PLEX_SERVER, SAMBA_DOCKER_SETUP) hold the Plex/Samba password in plain text, and it is weak. Change it, keep it only in Vaultwarden, redact the docs; only then push the folder to a private repo (upload was refused for that reason on 2026-10-12).

Handoff (2026-10-31): roll the schematic rules out to existing product repos

  • Done and merged today: EmbeddedEra/KiCad#12 (rendered overlap check, rotate-then-mirror fix, template 0 overlaps, scripting/schematic/sch_overlap_precommit.py), #13 (blocks 0 overlaps), EmbeddedEra/Project_Template#3 (tracked .githooks/pre-commit, CI overlap check with --base, AGENTS.md/CLAUDE.md rules, fresh board-1). SOP-021 1.19 and SOP-022 1.2 deployed. ~/.local/bin/kicad-overlap-precommit is now a shim to the library script (ops). Proof after merge: fresh clone of Project_Template main, overlap commit refused by the repo hook (library found via kicad_common.json) and by the shim.
  • Not yet checked: the template's own CI run on GitHub after merge (the Project_Template repo may lack the KICAD_LIB_TOKEN secret; look at the Actions run for adfb7b5 before trusting it).
  • Next action: OpenPulse (~/Documents/GitHub/OpenPulse, branch board-scaffold) gets the template's .githooks/pre-commit, .github/scripts/kicad_checks.py, the kicad-checks.yml changes (fetch-depth 0, safe.directory, --base step, hardware/_kicad_reports/), and the AGENTS.md hardware section + CLAUDE.md; replace its .git/hooks/pre-commit with core.hooksPath .githooks. Then the other template-made repos (gh repo list EmbeddedEra + check for product.yml). Proof per repo: overlap commit refused, CI script --base exits 1 on a changed sheet.

Handoff (2026-11-02 21:00 EST): design blocks moved to cloud sessions

  • Branch design-blocks pushed to EmbeddedEra/KiCad (11d3334). Has GATE.md (headless apply test works: IPC applyDesignBlockLayout, 0 um), first block ldo-xc6206-3v3 + _2s needs_review (ERC/DRC/overlap 0, apply pass), and blocks-run/ (CLOUD.md rules, cloud-setup.sh, blocks.tsv = 79 blocks tiers A/B/C, SOP copies). Server copy: worktree ~/kicad-blocks-run/main.
  • Server driver stopped (it billed Max; gate cost $10.32). The $228 cloud credit (expires 2026-11-05 02:59 EST) is spent only by anthropic_cloud sessions; the eeroute cloud session also draws on it.
  • Cloud probe (session_016XHSEQspyujhPwFJFPhLpA): KiCad 10.0.8 via PPA ~30 s, ERC/DRC run, pcbnew+IPC under Xvfb works after clicking the first-run wizard; no docker; ti.com ok, st.com/digikey blocked for curl.
  • Owner runs 3 cloud sessions (tiers A, B, C) on branches blocks-A/B/C; each writes blocks-run/REPORT-.md.
  • Next: merge blocks-A/B/C into design-blocks; review new_parts for ERP sync (SOP-008), symbols/EmbeddedEra_Blocks_.kicad_sym merge into one lib; draft PR design-blocks -> master was not opened (permission denied), open it then.

Log

  • 2026-11-04 task #150 closed: PR #49 merged (a40e7041), main checkout pulled and clean. Numerical reference in docs/PCB-DESIGN-RULES.md; three generic profiles corrected and natively probed; 80 unit tests and hosted quality gate pass. SOP-021v1.21 published. Generic impedance policy is complete; real products require stackup-specific calculation/order evidence. Details: project-template.

  • 2026-11-04: task #150 rule inventory: latest master ae5ca35d pulled; source-based numerical reference and Hellen profile caveats proposed in PR #49, commit e159fe73. Nine class rows / three profile rows verified, metadata check zero blockers. Default numerical rules preserved. Owning investigation/state: project-template. <<<<<<< Updated upstream

  • 2026-10-31: Block overlaps to 0 (draft EmbeddedEra/KiCad#13): Mounting-Hole_3mm fields moved off the DNP cross (both copies), USB_C_2 U6 fields clear of the R7/R8 GND. The 4 "wire under GND stem" hits (Can, RS3485, Serial) were a checker bug: xform mirrored before rotating; KiCad rotates, then mirrors on the sheet (proof: KiCad netlist puts Eeprom C1 pin 2 on GND only under the new order). Fixed on #12 (09eb9cd) with a test; sch_tidy uses the same xform, so its pin positions for rotated+mirrored symbols were wrong before too. Node sets and ERC unchanged; OpenPulse still 0.
  • 2026-10-31: Schematic rules in the product template (Angel's order). Draft EmbeddedEra/Project_Template#3 (branch schematic-rules): tracked .githooks/pre-commit (README step 4 git config core.hooksPath .githooks) runs the library's new scripting/schematic/sch_overlap_precommit.py; kicad_checks.py adds the rendered overlap check per root sheet (--base origin/$GITHUB_BASE_REF on PRs: changed sheets errors) and stops ERC'ing sub-sheets alone; workflow fetch-depth 0 + safe.directory, report path fixed; root AGENTS.md/CLAUDE.md and template AGENTS.md carry 7 schematic rules; hardware/board-1 was a stale flat copy, re-copied from template/EmbeddedEra_Project; fab.yml rule_file was the JLCPCB file, now the default. Library template: 5 overlaps fixed on #12 (9b41810, 2c7b252: SWD labels at wire ends, J1 moved 20.32 mm left; 47 node sets identical; PTS810 LCSC lib mismatch fixed). kicad-check: board-1 is a fragment like CI (ops 26aab00). Proof on a fresh clone: clean commit passes, overlap refused; CI script --base HEAD~1 exit 1 (error), --base HEAD warning exit 0, master library notice exit 0, hook without library warns exit 0. Template: kicad-check ERC 0e, DRC 0/0, overlaps 0; same 0 on the 10.0.5 container (CI's version); board-1 node sets identical to the library template (rename kept annotation). Hook also finds the library via KiCad's kicad_common.json EMBEDDEDERA_DIR and kicad-cli in KiCad.app (the Mac has neither on the shell; tested with a Mac-style fake HOME). SOP-022 1.2 (hooksPath in step 1.1) and SOP-021 1.19 row/step 8 edited, not deployed.

  • 2026-10-31: Rendered overlap gate (handoff steps 1 and 4). kicad-overlap-check ROOT --rendered (PR EmbeddedEra/KiCad#12, branch rendered-overlap-check, worktree ~/kicad-lib-overlap) measures stroked-text ink in kicad-cli's SVG vs other text and every drawn line. kicad-check (ops 4114b1b) runs it per root sheet in the container, --base REF = errors on changed sheets, else warnings; new kicad-overlap-precommit. Proof: OpenPulse c03d1dc 21 overlaps (all doc-check's), HEAD 0 text/text but 4 real text/line; same on 10.0.5 container and 10.0.7 AppImage. Library: 42 sheets, 22 warnings in 4 (all real). SOP-021 1.19 step 8 edited, sop-deploy after merge. Gotchas: KiCad SVG plots symbol fields twice (dedupe); hidden layer omits pin names; pdftotext boxes for vertical text are inflated (doc-check's GPIO0/GND hits were artefacts, the real one is VDD/GND).

  • 2026-11-01: Owner: PRs #9 and #11 reopened and merged to master (#9 4a2757c, #11 734cb8c) after merging master into each. #9: gen_ble54_models.py now builds both the CC2340 QFN24 and 1612 crystal models. #11: both sides had added L_10uH_0603 as different parts; master's Murata LQM18DN100M70L (300 mA, CC2340 DC/DC) keeps the name, OpenPulse's Taiyo Yuden LBMF1608T100M (80 mA, IPN EE-C-0241) renamed L_10uH_0603_80mA. Scripting tests 25 pass (esp32 model test needs LFS). kicad-check not run. No open PRs.
  • 2026-10-31: PR #10 merged to master (b047dad) on owner's OK, without #9: rebased onto master (after #13), conflict in scripting/gen_ble54_models.py resolved by dropping xtal1612(); 8 new symbols, all footprints present, RGE0024B STEP pulls from LFS. kicad-check NOT run (server unreachable from the Mac session). #9 (nRF 0201 + 1612 crystal) still open, unmerged.

    Stashed changes

  • 2026-10-31: PR #10 (cc2340r52-parts, stacked on #9): CC2340R52E0RGER symbol (2 units as TI U1A/U1B), RGE0024B footprint (EP 2.45, stock has only 2.7/2.1), 48 MHz TZ3908AAAO43 crystal, TI-BOM reference parts; owner decided nRF54L15 -> CC2340R52 today. Netlist in BLE_Module/hardware/BLE54_Module/ti_reference_circuit.md. Open: Murata MLCCs stock 0 at DK/Mouser; IPNs from the sync.
  • 2026-10-31: PR #9 (ble54-0201-1612-parts): 4 caps + 120R bead 0201 + Crystal_32MHz_1612_8pF (ABM12W-...-8-D1X-T3) and a new 1612 footprint/STEP. Open: ABM12W worst-case ESR 80 ohm / C0 2 pF is ~10 ohm over Nordic's CL=8 line (typical passes); owner to accept or choose another crystal. IPNs still to come from the sync (server).
  • 2026-10-16: Autorouter plugin research and plan (Freerouting + KiCadRoutingTools + KiCad 11 API): kicad-autorouter. Proposal, nothing built.
  • 2026-10-12: MacBook Air local clones retired (Mac had never run afex-local-resync.sh). Local-only work found by message+date match against origin (rewritten repos showed "ahead N, behind N" but held the same commits): pushed to rescue/mac-2026-10-12/* branches built on the clean GitHub twin commit (cherry-pick / diff apply), every one scanned for AFEX (only base64/binary false positives). New private repos: EmbeddedEra/5k, Garage_Opener, Pacer, Zebra-Labels, Bike-Computer. ~/Documents/GitHub/KiCad (KiCad's EMBEDDEDERA_DIR on the Mac) replaced by a fresh clone (650 MB, 0 AFEX, nordic-lib-kicad copied over); old 3.4 GB pre-purge copy and 31 other clones moved to Trash. Kept on the Mac: KiCad, KiCAD-MCP-Server (Codex MCP), Server, Website, Portable_Meter.
  • 2026-10-06: AFEX purge, second batch (owner order, verbatim "Rewrite history and force-push to remove AFEX from Cow_Remote, PSU, Boost_Gauge, Remote_Universal, Universal_Tester_003, Universal_Tester, safe-updi, ops-scripts and git-ai-commit. Backups first."). Same recipe as Cow_Robot_Board: backup mirror (0700, fsck clean) in ~/precious, open-PR check, tip fixed by a normal commit (KiCad: AFEX Library:->EmbeddedEra_Library, AFEX:->EmbeddedEra; kicad-check ERC/DRC per-file counts identical before/after on Cow_Remote, PSU, Boost_Gauge, Remote_Universal, Universal_Tester_003; text repos reworded; git-ai-commit appId/publish owner/author now neutral EmbeddedEra values, npm test 133 tests, same 130 pass / 2 fail as before the edit (the 2 are a .env fixture that fails in this environment)), git-filter-repo (paths, replace-text, messages, zips repacked via blob-callback), force-push --all and --tags. Fresh-mirror check on branches+tags: -S, -G, --grep, path search, git grep per revision and zip-content scan all 0 for the 8 repos done. SKIPPED: Universal_Tester (open PR #12). refs/pull still resolve old SHAs: Cow_Remote 1-4, Remote_Universal 1 (Cow_Robot_Board 1-14, earlier); only GitHub support can drop them. ExpressLRS fork: false positive only (lowercase afex inside base64 image data of Doc/200428E-1501384.pdf and bytes of two VS Code .BROWSE DB files); not rewritten. Cow_Robot_Board release hw/Robot-Cow-004B/A: only the schematic PDF in Robot-Cow-004B-A-fab.zip replaced (AFEX sat in two JS annotations; kicad-cli from the tag's purged commit, 1 page, text identical, the other 32 members byte-identical, sha256 64d96ad4...), re-uploaded with --clobber; original kept as ~/precious/Robot-Cow-004B-A-fab.pre-afex-purge-20261006.zip. The Cow_Remote 006/A and finger-003/A fab zips were already clean. ~/.local/bin (ops-scripts) pushed first, then reset to the purged origin/main. Support text: ~/Notes/projects/afex-github-support-request.md. Local-clone resync: ~/Notes/projects/afex-local-resync.sh (dry-run done, real run not run). Old-SHA lists and commit-maps: ~/precious/afex-commit-maps-20261006/.
  • 2026-10-06: AFEX purge of EmbeddedEra/Cow_Robot_Board (owner "Ok"). First fixed the current files on main (0de0895): dropped the AFEX Library pinned lib from both .kicad_pro, repointed AFEX Library: footprints to EmbeddedEra_Library and AFEX: symbol nicknames to EmbeddedEra in sch/pcb/fp-info-cache; kicad-cli 10.0.5 loads both, ERC 288 and DRC 120 (with parity) identical before and after. Backup ~/precious/Cow_Robot_Board-pre-afex-purge-20261006.git (0700). git-filter-repo on a fresh mirror: paths matching afex removed, replace-text AFEX -> EmbeddedEra_Library:/REMOVED, messages scrubbed, plus a blob-callback that repacked 41 KiCad backup zips with the same text replacement (compressed content is invisible to -S). Force-pushed 11 branches and 8 tags. Fresh-mirror check on branches and tags: -S afex, --grep, path search and git grep over every revision all 0. Not removable by us: refs/pull/1..14 (still resolve old SHAs) and one release asset PDF. PRs were 12 merged/closed, none open. Other EmbeddedEra repos scanned (48): clean except the ones listed under Open. Local: ~/Cow_Robot_Board resynced; the rest blocked, owner commands (per repo R, with commit-map from the purge in /tmp/claude-1000/.../scratchpad/crbf/filter-repo/commit-map): git -C R fetch --prune --force --tags origin, git -C R reset --hard origin/main in each checked-out worktree, git -C R branch -f <b> origin/<b> for the other branches (sandbox/robot-cow-production maps via the commit-map to 0de0895-era descendants; if unsure reclone), then git -C R reflog expire --expire=now --all && git -C R gc --prune=now. Non-git copies with AFEX (regenerable, untouched): ~/engineering/cache/{Universal_Tester,Cow_Robot_Board,Cow_Remote}, ~/engineering/site/docs and docs.prev, ~/engineering/codex-test/task148/{site,candidate-site,baseline-html,candidate-html,cache,board}, ~/.local/state/engineering-backups/task148/cache; git clones of other repos with AFEX: ~/engineering/repos/{Boost_Gauge,Universal_Tester_003,Remote_Universal,PSU,Cow_Remote}, ~/engineering/cow-remote-*. ~/precious list: /tmp/claude-1000/precious_afex.txt (154 files).
  • 2026-10-06: Own-libraries-only rule (kicad-own-libraries-only) applied on branch own-libs: kicad-check gained an "EmbeddedEra libraries only" check (symbol Footprint outside EmbeddedEra_Library, footprint model missing/outside 3dmodels/, board_feature tag as the only no-model marker), kicad-erp-sync audit lists ERP Symbol/Footprint outside EmbeddedEra, new kicad-adopt copies a stock footprint+STEP or symbol in (49 footprints, 40 models, EmbeddedEra_Generic R/C/LED/D_Zener/FerriteBead, EmbeddedEra_Neoden_YY1_PNP; 78 symbol Footprint fields repointed; 20 board-feature footprints tagged). Proposal Sheet repointed (old values in columns O-P). SOP-008 2.4 section 10. Check: 118 errors = 110 + 8 missing-model library items, so not merged.
  • 2026-09-18: Added the first manufacturer-neutral EmbeddedEra passive pilot: EmbeddedEra_Resistors_0603.kicad_sym, 799 one-percent E24/E96 values generated deterministically from the existing Yageo library. Standard Manufacturer/MPN fields remain the preferred exact Yageo part for BOM/ERP compatibility; AVL fields approve Vishay CRCW0603 e3 and KOA RK73H1J across the source range, plus Panasonic ERJ-3EK only from 10 ohm through 1 Mohm. Boundary supplier lookups caught and prevented a false blanket Panasonic approval. Generator, regression test and policy are under scripting/; KiCad 10 parses the complete output. Merged/pushed as a79138f. Capacitors deliberately wait for a separate dielectric/voltage/DC-bias policy.
  • 2026-09-18: Made the generic passive AVL directly editable at scripting/generic_passives_avl.json; adding, removing, reordering, or range-limiting an approved alternate there regenerates all 799 symbols. Validation rejects incomplete, duplicate, or inverted-range entries. Tests and KiCad parse passed; pushed as 5f82de5.
  • 2026-09-18: Completed task #1 with scripting/fill_from_cache.py: exact-MPN-only Mouser cache mapping for Manufacturer, Description, and Datasheet; existing non-empty metadata is never overwritten and writes are atomic. The initial cache had 116 exact MPNs covering 76 symbols; it preserved curated fields and filled two blank datasheets. Another 8,500 MPN-bearing symbols await exact cached responses and will be filled safely on later reruns. Offline regression, idempotence check, and KiCad parse passed; pushed as 0e66b3a.
  • 2026-09-18: Completed task #4's Panasonic 1206 audit. The original file was systemically corrupt: only 684 parseable symbols, 79 blank MPNs, and all 605 populated MPNs were Yageo RC1206JR 5% parts under a Panasonic manufacturer label. Rebuilt all 799 E24/E96 values deterministically with active Panasonic ERJ-U08F (1 ohm–1 Mohm, 0.25 W) and ERJ-PM8F (>1 Mohm–10 Mohm, 0.66 W) MPNs; exact boundary parts were checked through the configured supplier APIs. Generator, regression test, and full audit record are under scripting/; KiCad 10 parses the output. Merged/pushed as e75aae0.
  • 2026-09-18: Fixed task #147: ESP32-C6-LCD-1.47 now references the tracked EmbeddedEra_Library:ESP32-C6-LCD-1.47 footprint instead of the machine-local Angel_Library. KiCad 10 exported the symbol successfully; pushed commit 974975c.
  • 2026-09-09 Researched KiCost for lifecycle/cost. KiCost v1.1.20 (Mar 2025) is BOM-oriented, leans on Octopart (now paid) plus scrapers; it does flag obsolete/NRND but is the wrong shape for a library scan. Plan: use official digikey-apiv4 (ProductStatus, datasheet, pricing) + mouser PyPI for dual-source, key on the MPN field; normalise the 5 MPN field names first. For symbol generation: easyeda2kicad (LCSC) / kandle (SnapEDA, Ultra Librarian ZIPs); no free tool generates symbols straight from the Digi-Key API. Parser: kiutils is stale; a symbol-only s-expression pass is enough.
  • 2026-09-09 Wrote scripting/normalize_mpn.py (unified 5 MPN field names → "Manufacturer Part Number", 204 renames, 1 dup dropped; preserves CRLF) and scripting/lifecycle_scan.py (Mouser part-number search, stdlib only, full raw JSON cached in scripting/.cache/mouser.json, 30-day refresh, CSV report). 6,814 unique MPNs → ~7 days at Mouser's 1,000/day quota. Key lives in ~/.config/kicad-libsync.env.
  • 2026-09-09 Decision: sourcing fields on every symbol are exactly Description, Manufacturer, Manufacturer Part Number, Datasheet, LCSC (not JLCPCB; LCSC is what kicad-jlcpcb-tools/easyeda2kicad read by default). scripting/standardize_fields.py enforces it: renamed JLCPCB/JLCPCB Part #/Part#/Alt, stripped whitespace, dropped stray Field6/KLC_*/PARTREV, added empty hidden placeholders. All 8,661 symbols now pass; kicad-cli parses all 26 libs. Three odd-indent single-symbol libs were reformatted with kicad-cli sym upgrade --force. Run order: normalize_mpn.py then standardize_fields.py. Uncommitted in working tree.
  • 2026-09-09 Digi-Key Product Information v4 wired into scripting/lifecycle_scan.py (client-credentials OAuth, no callback; token lives 10 min). --source mouser|digikey, caches in scripting/.cache/<source>.json. Digi-Key Description.ProductDescription is the uppercase catalogue style for kicad-symbol-fields; DetailedDescription is the long one. Both quotas 1,000/day; run each daily with --limit 950.

  • 2026-09-09 Built part-lookup CLI: source scripting/partlookup.py, shim ~/.local/bin/part-lookup, subcommands get / search / lib. Permanent per-part raw cache at ~/.local/share/part-cache/<source>/, shared with lifecycle_scan.py (old .cache/*.json migrated, 1,905 entries). Global skill ~/.claude/skills/part-lookup/SKILL.md + pointer in ~/.claude/CLAUDE.md so every project uses it instead of browsing. Gotchas: Mouser returns prices as "$0.10" strings and stock as strings; Digi-Key QuantityAvailable can be null with stock only in ProductVariations. Digi-Key keyword search returns reel-variant MPNs (RC0402FR-13…), so lib must be checked by value, not by the search result MPN.

  • 2026-10-06: Post-ERP-clean-up library pass (ffc1cd7): 151 symbol Descriptions synced to the ERP ALL-CAPS text (audit: 0 description mismatches, 0 IPN problems, 0 conflicts), IPN repointed 0092->0163, 0104->0105, 0114->0113 (two kept because designs use them; SOP-008 step 15 allows several symbols per number). Retirement of 19 unused symbols was blocked pending owner OK; see Open item in embeddedera-app.

  • 2026-10-13: Shared schematic tools added (64ef5b9): overlap check now models KiCad's field-justification flip and counts power-symbol arrows (it had missed 28 overlaps on rusefi-sti-2004); house-style tidy ported from KiCad's autoplace_fields.cpp. USBLC6-2SC6 and HRO USB-C got LCSC numbers on branch sti2004-parts; NCV8401BDTRKG added there.
  • 2026-10-13: Gotchas: one malformed constraint in a .kicad_dru makes KiCad ignore the whole file with no message (test: add a 5 mm clearance rule and see DRC explode). Board Setup minimums are floors custom rules cannot relax: keep them at fab capability and tighten with rules. min_resolved_spokes takes a bare number, not (min n).
  • 2026-10-13: pcbnew Python gotchas (KiCad 10.0.5): board.Remove() of footprints/vias/zones corrupts the heap (later segfault, often while printing an unrelated exception: run with -u -X faulthandler and print exceptions without importing traceback); SaveBoard of a board loaded without its .kicad_pro writes KiCad defaults over the project file; LoadBoard twice on one path returns the cached board; call BuildConnectivity() before ZONE_FILLER or every island is dropped. PCB_VIA has no SetUnconnectedLayerMode (use Padstack()).
  • 2026-10-13 (moved from memory kicad-schematic-automation, 2026-10-19): schematic-scripting lessons from rusefi-sti-2004. The tools list and the pcbnew/DRC/routing traps already live in ~/kicad-lib/scripting/README.md ("Known traps"; outside the vault, so not edited from here). Not yet there: (1) kicad-cli has no autoplace and no schematic API, so edit the .kicad_sch text surgically (small diffs) and re-check. (2) When KiCad behaviour is unknown, measure it: build a tiny schematic with every case, kicad-cli sch export pdf, read positions with pdftotext -bbox (how the field-justification flip rule was found; pinned in test_sch_tools.py). (3) After any wire/symbol edit compare netlists by node sets (kicad-cli sch export netlist --format kicadsexpr); it caught a wire end on mid-wire not connecting (needs a junction), a dropped stub disconnecting shield pins, and a helper that silently discarded its own move. (4) A tidy step must not trade overlaps: keep a running score that only goes down. (5) The checker has blind spots each time (rotated fields, power arrows, own text inside small bodies): render and zoom dense areas too, and when a render shows a problem the checker misses, fix the checker first. (6) kinet2pcb (community) builds a PCB from a netlist but drops symbol paths and the board outline; kicad-pcb-from-netlist keeps both. KiCad 10 has no CLI autoplacer: placement = fixed/centred parts + grid arrays + pull-to-connected-pads, checked by DRC (courtyards, schematic parity). (7) Hellen boards are 4-layer (modules carry In1/In2); default all parts on top for one-pass JLC assembly. (8) Routing reports must check unrouted connections per net, not the DRC error count (one run "passed" with two power nets missing).

Checks — kicad-cli, KiCad 10 (2026-09-13)

kicad-cli is installed as a wrapper (since 2026-10-13 around the KiCad 10.0.7 AppImage; KICAD_IMAGE=kicad/kicad:<tag> forces a container) — originally around the pinned kicad/kicad:10.0.5 container (~/.local/bin/kicad-cli) — no sudo apt, and a pinned version means a check that passes here passes the same way in CI. kicad-check runs ERC and DRC over every schematic and board in a repo and prints, or emits JSON for the audit.

Three things it had to learn before its numbers meant anything:

  1. It generates the library tables itself. There is no fp-lib-table or sym-lib-table in the repo, so a fresh clone cannot resolve our libraries and reports thirty "footprint library not configured" warnings. Generated from the repo's own .pretty and .kicad_sym files, the same everywhere.
  2. A block is a fragment, not a design. Unconnected pins and undriven power rails are the point of a reusable block — the parent design provides them. Counting them gave 227 "errors" across 44 projects, nearly all meaningless. Anything under blocks/ or template/ is exempt from that class.
  3. A dangling label in a fragment is downgraded, not exempt. It is often the interface to the parent, and it is also exactly how a typo looks — so it is a warning for a person to judge once, not a guess by the tool.

Version matters more than it looks. The first run used KiCad 9 and reported 21 errors; 10.0.5 reports 57 across 22 projects. The repo is mixed — block schematics are still the v9 format (20250114) while the symbol library is already v10 (20251024) — so the older CLI was reading a newer library. Design happens in 10, so 10 is what the checks use.

The real findings are mostly manufacturing: usb_c and USB_C carry 16 DRC errors each (clearance, one at 0.1984 mm against a 0.2 mm rule; hole clearance; an invalid outline).

Next: wire kicad-check --json into sop-audit as a SOP-008 check so the count lands on the board and stays visible, and see engineering-portal for the pages built on top.

kicad-ibom — the BOM you use at the bench (2026-09-14)

kicad-ibom board.kicad_pcb writes a single self-contained HTML file: click a BOM line and the part highlights on the board, front and back. It is a production tool, not a drawing — it is what belongs on a tablet while populating a board.

  • InteractiveHtmlBom 2.12, vendored at ~/.local/share/ibom, run inside the pinned KiCad container because it needs pcbnew.
  • Headless works via INTERACTIVE_HTML_BOM_NO_DISPLAY=1; without it the tool wants an X server and the container has none (there is no xvfb in the image either).
  • Verified self-contained: no external CSS, JS or fonts, so it opens from a USB stick or an offline tablet. 325 kB for the JLCPCB template board.

It refuses a board with nothing on Edge.Cuts, and that refusal is correct rather than a bug: blocks/usb_c and several other blocks have no outline, which is the same thing DRC reports as invalid_outline. A block that is only ever dropped into a parent board may not need one — but then it does not get an interactive BOM either, and that is the honest answer.

Next: generate one per board in CI and publish it, which is what engineering-portal shows. - 2026-09-16: Gotcha: .gitattributes in EmbeddedEra/KiCad tracked *.STEP and *.stp in LFS but not lowercase *.step, so 66 models were LFS pointers on every clone (the shop server included) and every render showed a bare board. Fixed in commit c85a79d (*.step, *.wrl added). The server has git-lfs 3.8 user-space at ~/.local/bin/git-lfs; git lfs pull in ~/kicad-lib after cloning. CI checks out the library with lfs: true. - 2026-09-28: Every EmbeddedEra footprint model now lives in 3dmodels/ and is referenced as ${EMBEDDEDERA_DIR}/3dmodels/<file> (25 KiCad stock models copied in so a KiCad upgrade cannot change them). CI step .github/scripts/check_model_paths.py enforces it. Removed the stale EmbeddedEra_Library.pretty.zip and a tracked JLCPCB backup zip; README variable renamed to EMBEDDEDERA_DIR. Pushed as 3740c9f. Still missing models (allowlisted in the check): YAAJ Blue/Black Pill .wrl (5 footprints), 850-10-005-10-003000.STEP (PROGRAMMER_1x05), SolderWire-0.5sqmm_1x05 and the 0.1sqmm SolderWires (need Connector_Wire.3dshapes from kicad-packages3D). Local KiCad 10 sym/fp lib tables now register all repo libraries; legacy .lib symbols (YAAJ, digikey-symbols) and 10 loose .kicad_mod files in footprints/ are not registered. - 2026-09-28: Added install/ (double-click installer: Install-KiCad-Libs.command / .bat / install-kicad-libs.sh, backing script install_kicad_libs.py) that registers every repo symbol/footprint/block library and the EMBEDDEDERA_* path variables in KiCad 9 and 10 config; refuses to run while KiCad is open (KiCad rewrites the tables on exit and erased hand-added entries once). Windows/Linux paths untested. Added EmbeddedEra_Resistors_0402/0805/1206 (799 x 1% E24/E96 each) from one generator scripting/generate_generic_resistors.py; AVL per package in generic_passives_avl.json (series verified through part-lookup; 1206 has no alternates above 1 Mohm because ERJ-PM8F is 0.66 W). 0805 Yageo source had one stray duplicate 60.4 ohm, dropped. Not built: 0201, 1210, 2010, 2512 (2512 Yageo source corrupt), 5% variants. Local commits 29e7c46..5f088ab, not yet pushed. - 2026-09-28: Added EmbeddedEra_Resistors_0201/1210/2010/2512 (799 x 1% each) from the same generator; no source symbols exist for these sizes, so the Yageo MPN comes from yageo_code() (reproduces all 799 existing MPNs for 0402/0603/0805). 2010 and 2512 use series RC2010FK/RC2512FK (the FR code is not found at either distributor). Spot-checked by part-lookup, not every value: many values show 0 stock and a few are Mouser-only. Panasonic alternates: ERJ-1GNF (0201), ERJ-P14 (1210), ERJ-1TYF (2512); none active for 2010. Stock footprints and models for these sizes copied into the repo. Still not built: 5% variants. Local commits ahead of origin, not pushed. - 2026-09-28: KiCad 9 support dropped; repo files upgraded to KiCad 10 format with kicad-cli (27 sch/blocks, 11 boards, 16 symbol libs, 324 footprints), 60+117 stock 3D refs repointed to ${KICAD10_3DMODEL_DIR} (.wrl -> .step), installer is KiCad-10-only. ERC 601 / DRC 240 identical before and after. GOTCHA: kicad-cli sym upgrade keeps only the LAST entry per repeated symbol name, silently dropping distinct MPNs (0603_Cap_Yageo 586->313, 1206_Cap_Yageo 331->205, Bourns_output 413->316); those three were restored to pre-upgrade content and stay old format (fix later by making symbol names unique). Also footprints/PCB_USBC.pretty was a read-only dir that broke git merges (chmod u+w). Added 5% resistor libs (EmbeddedEra_Resistors_<size>_5pct, 169 each, all 8 sizes; 2010/2512 use RC..JK/FK series) and EmbeddedEra_Capacitors_0402/0603/0805/1206 (689 symbols: C0G + X7R<=1uF, 6.3-100 V, one lib per size, series-level AVL; generator scripting/generate_generic_capacitors.py). All 16 resistor + 4 capacitor libs are KiCad 10 format and fixed points of sym upgrade. Pushed. Open: 5 AFEX footprints with .wrl models that have no .step in KiCad 10 stock; capacitors 0201/1210/2010, X5R policy, Murata GRM188/21/31 codes unverified; the Panasonic 1206 source still references AFEX footprint. - 2026-09-28: Template refresh (template/EmbeddedEra_Project): passives moved from Neoden_YY1_PNP to generic EmbeddedEra_Resistors_0603 / EmbeddedEra_Capacitors_0603 (100n 50V X7R, 1u 16V X7R, 10K 1%), embedded symbols refreshed (ERC 55 -> 44, lib_symbol_mismatch 0), nets identical (47), FB1 footprint now EmbeddedEra_Library:FB_0603_1608Metric, Customer text variable added beside Costumer, legacy template/default and JLCPCB_Multilayer removed. Open: FB1 (220R) and SW1/SW2 (PTS810) still on Neoden_YY1_PNP (no EmbeddedEra symbol); generic R/C libs carry no IPN yet; U1/J1 have IPN but blank Manufacturer/MPN; stale (project "") instance entries in the schematic; the 39 pin_not_connected/3 power_pin_not_driven ERC items need no-connect flags/power flags. - 2026-09-28: Removed the routed "SENSOR READER 003" board from template/JLCPCB_1-2Layer (it was a product board with no schematic, not a template). A local copy was made in its own repo and then deleted at Angel's request; the only copy is now git history in this repo, last present at aa877f9. template/ holds only EmbeddedEra_Project plus the worksheets. - 2026-09-28: Added FerriteBead_220OHM_0603 (INPAQ MHC1608S221NBPDG) and SW_Push_PTS810 (C&K PTS810SJM250SMTR LFS) to EmbeddedEra.kicad_sym (IPN blank, sync assigns). Removed Preferred/Alternate/Sourcing Policy fields from all 20 generic libs and the template (alternates live in the ERP BOM per bom-alternates; the AVL JSON stays as the source that feeds the ERP step). Template now uses only EmbeddedEra libs (Neoden refs gone; FB1 Value is now "220OHM"). SOP-008 2.0 draft (steps 21-26) covers generic passives; kicad-erp-sync bom-resolve is still to build on the server. Rollback tag rollback/before-alternates-strip (983e55f). Pushed.

  • 2026-10-06: Library clean-up finished (f04b153): deleted 19 unused symbols (165 to 146); stripped IPN from board features (EE-M-0001, EE-C-0127, 0116, 0118, excluded from BOM) and programming pads (0065 STM32 SWD 1.27 mm, 0067 UPDI 1.27 mm: excluded, footprint-only, 3D model removed from PROGRAMMER_1x05_P1.27mm_Vertical); IPN stripped from placeholders 0010, 0094, 0103, 0041; 0098 repointed to EE-C-0196 (0196 extends 0098, so 0098 stays as the base drawing). kicad-erp-sync audit accepts a blank IPN when the ERP part is archived. SOP-008 2.3 steps 35 to 37. kicad-check unchanged at 87 projects, 110 errors.
  • 2026-10-06: Library clean-up f04b153 broke loading (deleted REG_APE8865N parent of XC6206 derived symbols); fixed in 22780df, which also restored the 2.54 mm PIC/STM32 programming pads as footprint-only (owner uses 2.54 mm). kicad-check now fails if a symbol library won't load.

  • 2026-10-06: ERP-as-KiCad-library phases 1-2 done on the SANDBOX ERP only (kicad-erp-library-plan). Plugin 2.1.0 installed and read; production already runs 2.0.4 with templates, categories, 141 parameterised parts and a LAN httplib (the plan had not noticed). Demo: erp-library/httplib_check.py (branch erp-httplib in kicad-lib, commit 747f323, unpushed) lists 175 parts, resolves a resistor and an STM32, kicad-cli BOM and netlist carry IPN, Footprint, Value, MPN, and the BOM exports with the ERP stopped. Proposal Sheet (189 parts): https://docs.google.com/spreadsheets/d/1zQM6SUKdlRZvnzNmMWaYzbCdJu_AKqzXe0CEH4hv3Hw/edit . Cloudflare bypass script prepared, not applied: ~/assistant-sandbox/scripts/erp-kicad-public-path.py; blocker is the forged Cf-Access-Authenticated-User-Email header (production trusts it), strip it in the ERP Caddyfile first. SOP-008 2.2 draft section 8. Sandbox stopped.

  • 2026-10-06: AFEX purge (owner: no AFEX in our GitHub libraries, delete history). Backup mirror ~/precious/kicad-repo-pre-afex-purge-20261006.git. Commit 590cb1f deleted footprints/AFEX Library.pretty (260), both AFEX symbol libs, repointed ~6,200 Footprint fields to EmbeddedEra_Library (stock-derived; pad geometry equals KiCad stock except old AFEX 0402/0603/0805/1206 caps and D_SOD-323F, which differed by <=0.05 mm), blanked 477 with no equivalent. Then git-filter-repo on a fresh clone (paths matching afex removed, text AFEX -> REMOVED, messages scrubbed) and force-pushed all 6 branches and the tag; new master 8f6ff32; no PRs. Verified on a fresh mirror: git log --all -i -S afex, --grep, and git grep -i afex over every revision are all empty. own-libs merged into master. kicad-check not worse per project.

  • 2026-10-13: Installed ~/kicad-lib (master) into the server's KiCad 10.0 GUI via install/install_kicad_libs.py: 46 symbol, 6 footprint, 2 design-block libs + EMBEDDEDERA_* vars in ~/.config/kicad/10.0. EmbeddedEra libs only (no KiCad stock tables), per kicad-own-libraries-only; so no power: symbols until an EmbeddedEra power lib exists. Re-run the installer after a pull adds libs.
  • 2026-10-13: Branch cleanup: deleted merged own-libs, generic-0603, fix-panasonic-1206 (local + worktrees ~/kicad-lib-ownlibs, ~/kicad-generic, ~/kicad-panasonic) and e-branch-1, fix/kicad-check-errors on GitHub. Left: cow-yy1-rotate (1 commit, kicad_to_yy1 --rotate + Robot Cow feeder slots; merges clean, tests 6 pass/1 skip on py3.12) and erp-httplib (local only, unpushed).

  • 2026-10-13: PR #2 merged (8d8d95e): kicad_to_yy1 --rotate, specific-footprint feeder match, Robot Cow YY1 slots. Branch cow-yy1-rotate deleted. erp-httplib pushed to GitHub (placeholder token only), not merged. CI failure on #2 is the pre-existing 21 errors, not this change (script/toml only).

  • 2026-10-13: The 21 CI errors were all DRC invalid_outline on design-block .kicad_pcb (no Edge.Cuts, correct for a block). kicad-check already exempted it for fragments; CI's copy had drifted. PR #3 adds it to CI FRAGMENT_EXEMPT; reproduced in kicad/kicad:10.0.5: 21 -> 0 errors.

  • 2026-10-13: Owner: checks run on our server, not GitHub (kicad-checks-on-server). Pre-push hook in ~/kicad-lib gates master on kicad-check (89 projects, 0 errors, ~2 min; tested refusing on failure). GitHub stays as storage. SOP-021 1.4.

  • 2026-10-13: GitHub Actions removed from master (1a31bc2), pushed through the kicad-check pre-push gate; PR #3 closed. GitHub is storage only.

  • 2026-10-13: For rusefi-sti-2004 (worker on Fable): 0 ohm jumpers added to the generic resistor generator (EE_R__0_5%, RC*JR-070RL, active at DK/Mouser); power symbols adopted into EmbeddedEra_Generic; new part symbols and footprints on branch sti2004-parts. JK-nSMD005 graphic slimmed to 2.0 mm so fuses stack at 2.54 mm.

  • 2026-10-13: Looked at rusEFI hellen-one as a model for reusable modules. It is a gerber-merge system: each module is frozen fabricated gerbers+BOM+CPL per revision, the board is a frame of placeholder footprints, and bin/process_board.py + gerbmerge merges them (python3.8/Docker, no licence on the repo, copper not editable, no DRC across modules). Not adopted. KiCad 10 design blocks already carry schematic + PCB layout (.kicad_pcb inside the .kicad_block); only 7 of 26 of ours have a layout (Battery_Charger_1s, Led_0603 x3, Regulator-5_3.3V, Stm32g0b1k_32pin, USB_C). Old blocks/<name>/ project folders duplicate them.
  • 2026-10-13: Owner wants the PCB side of blocks in use. KiCad 10 flow (manual, Design blocks): place block in schematic as group -> Update PCB with "Group footprints based on symbol groups" -> right-click group -> Apply Design Block Layout. The 7 blocks with layouts have footprint refs identical to their symbol refs. Wrote SOP-045 KiCad Design Blocks (draft).
  • 2026-10-13: KiCad IPC API survey (source mirror). 10.0: board API + RunAction (any tool action by name, e.g. pcbnew.InteractiveDrawing.applyDesignBlockLayout) + ParseAndCreateItemsFromString; schematic API empty. master/11.0 (dev, Sep 2026 commits) adds ImportNetlist (= Update PCB from Schematic), PlaceFootprintFromLibrary, schematic PlaceSymbolFromLibrary, GetSchematicNetlist, library table commands. Gap: no Place Design Block command in either. Upstream is gitlab.com/kicad/code/kicad (merge requests), not GitHub. Do not fork.
  • 2026-10-30: usb-hub-parts 7b8f95e: 3D model transforms fixed for RNH0030A (rotate z 90), ShouHan USB-C (offset 0 -1.3 1.63), Jing USB3-A (z -0.5), CUI UJ2 (4.11 -3.5 0, shell recoloured). KiCad model frame is y-up: board_y = -(model_y + offset_y). Boards embed model transforms, so USBHub2/USBHub3 need Update Footprints from Library. Before/after PNGs: /tmp/claude-1000/-home-angel-claude-remote/3239e64b-f3a1-4be8-8222-62c1472e0c84/scratchpad/{before,after}.
  • 2026-11-02: Reviewed owner's 50-block overnight claude -p prompt (not run). Decided: build in ~/kicad-lib on branch design-blocks from origin/master, into existing blocks/EmbeddedEra.kicad_blocks/ (not a new root lib); ~11 of the 50 map onto existing blocks, which get layouts first, not duplicates; EmbeddedEra parts + ERP IPN only (no stock KiCad libs, no invented IPNs); blocks carry no Edge.Cuts and no GND pour (dev// harness owns them); gate = applyDesignBlockLayout via IPC on Regulator-5_3.3V before fanning out; reuse scripting/ tools, no new tools/; top-only default + _2s variant only where it saves area; run on the server (docker tools + IPC harness), ≤3 parallel worktrees. Pending owner: confirm "single/double-sided" = assembly side, and the $ cap.
  • 2026-11-02: Owner approved: both variants for every block (<id> top-only, <id>_2s double-sided), list widened to 80 blocks ranked by use in our 20 product repos (tier A = on 2+ boards). Launched ~/kicad-blocks-run/run.sh in tmux blocks (19:44): per-job claude -p with hard per-block $ cap, total cap $185 of the $228 credit (expires 2026-11-05 02:59 EST), no new jobs after 01:30 EST; phases gate (apply test via IPC + ldo-xc6206-3v3) -> parts (missing parts into symbols/EmbeddedEra_Blocks.kicad_sym + footprints/EmbeddedEra_Blocks.pretty, ERP sync list in PARTS.md) -> 3 slot worktrees merged into branch design-blocks (worktree ~/kicad-blocks-run/main). Rules in ~/kicad-blocks-run/RULES.md, list in blocks.tsv, spend in costs.tsv. Nothing pushed.
  • 2026-11-02: Gate passed on server (GATE.md, apply test automated); first block ldo-xc6206-3v3 (+_2s) needs_review. Owner chose to run everything as cloud sessions to spend the $228 cloud credit; server driver stopped; design-blocks pushed with blocks-run/ cloud kit.